UVM Verification Engineer - Sverige - microTECH Global Limited

Beskrivning

Job Description

Job Title:
UVM Verification Engineer

Duration: 12 months


Location:
Sweden


Remote:
Up to 100% available

Start:
ASAP Job Description We are looking for verification engineers for the clients Machine Learning IP. At the client, verification is a crucial and integral part of the hardware development.

In this role you will support the design and verification of the client's next generation IP, using the latest methodologies and technology.

Requirements

• Strong discipline and attention to detail in ensuring effective high quality verification that minimizes bug escapes to higher levels of validation
• Coverage driven verification expertise, in highcomplexity designs
• Experience in block level, top level and system level verification
• Experience in Verilog/SystemVerilog/VHDL
• Experience in the specification, creation, and debug of SystemVerilog/UVM constrainedrandom testbenches
• Experience in planning the verification process and making realistic effort and timescale estimates

Job Reference 19003TK5

Location Sweden

Categorisation Digital IC Design / Verification: Verification
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